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Error code: DatasetGenerationError
Exception: AttributeError
Message: 'list' object has no attribute 'get'
Traceback: Traceback (most recent call last):
File "/usr/local/lib/python3.12/site-packages/datasets/builder.py", line 1585, in _prepare_split_single
example = self.info.features.encode_example(record) if self.info.features is not None else record
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/usr/local/lib/python3.12/site-packages/datasets/features/features.py", line 2045, in encode_example
return encode_nested_example(self, example)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/usr/local/lib/python3.12/site-packages/datasets/features/features.py", line 1340, in encode_nested_example
{k: encode_nested_example(schema[k], obj.get(k), level=level + 1) for k in schema}
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/usr/local/lib/python3.12/site-packages/datasets/features/features.py", line 1340, in encode_nested_example
{k: encode_nested_example(schema[k], obj.get(k), level=level + 1) for k in schema}
^^^^^^^
AttributeError: 'list' object has no attribute 'get'
The above exception was the direct cause of the following exception:
Traceback (most recent call last):
File "/src/services/worker/src/worker/job_runners/config/parquet_and_info.py", line 1450, in compute_config_parquet_and_info_response
parquet_operations, partial, estimated_dataset_info = stream_convert_to_parquet(
^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/src/services/worker/src/worker/job_runners/config/parquet_and_info.py", line 993, in stream_convert_to_parquet
builder._prepare_split(
File "/usr/local/lib/python3.12/site-packages/datasets/builder.py", line 1447, in _prepare_split
for job_id, done, content in self._prepare_split_single(
^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/usr/local/lib/python3.12/site-packages/datasets/builder.py", line 1604, in _prepare_split_single
raise DatasetGenerationError("An error occurred while generating the dataset") from e
datasets.exceptions.DatasetGenerationError: An error occurred while generating the datasetNeed help to make the dataset viewer work? Make sure to review how to configure the dataset viewer, and open a discussion for direct support.
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vectors/power_congestion_worst/nets/net_5374
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6432
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5779
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3162
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4777
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2614
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3967
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5595
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_134
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3585
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1939
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5439
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3996
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2486
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4804
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3888
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4010
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2398
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4696
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1947
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1326
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6891
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7672
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_577
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_855
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4113
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2927
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_524
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4932
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6207
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7807
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7587
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2016
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2819
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4898
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6318
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3158
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_8
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5875
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7127
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7361
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5794
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3434
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4109
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1454
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1568
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4619
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2295
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3621
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2371
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6921
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2366
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2988
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4850
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_158
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2561
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1663
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1877
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7606
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_787
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4367
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5002
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2817
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_316
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_333
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_403
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7393
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4070
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5430
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3844
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_4997
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_2299
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1408
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5986
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hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3114
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_3891
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6276
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1739
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6489
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6668
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_6896
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_1948
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_7216
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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vectors/power_congestion_worst/nets/net_5500
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
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}
|
vectors/power_congestion_worst/nets/net_7727
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 183539520,
"aspect_ratio": 2,
"height": 19710,
"hpwl": 29022,
"l_ness": 0.6065151691436768,
"pin_num": 4,
"rsmt": 29022,
"width": 9312
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 5818,
"name": "sprite_gen/load_out5[23]",
"pin_num": 4,
"pins": [
{
"driver": 1,
"i": "sprite_gen/sprite5/pix1_reg_4_",
"id": 17863,
"p": "Q"
},
{
"driver": 0,
"i": "sprite_gen/sprite5/U72",
"id": 17864,
"p": "A"
},
{
"driver": 0,
"i": "sprite_gen/sprite5/U76",
"id": 17865,
"p": "B1"
},
{
"driver": 0,
"i": "sprite_gen/sprite4/U91",
"id": 17866,
"p": "A1"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_5818
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 5886184,
"aspect_ratio": 2,
"height": 3053,
"hpwl": 4981,
"l_ness": 1,
"pin_num": 2,
"rsmt": 4981,
"width": 1928
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 4157,
"name": "sprite_ram/oam[653]",
"pin_num": 2,
"pins": [
{
"driver": 1,
"i": "sprite_ram/oam_reg_174__5_",
"id": 14107,
"p": "Q"
},
{
"driver": 0,
"i": "sprite_ram/U1784",
"id": 14108,
"p": "B1"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_4157
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 12082750,
"aspect_ratio": 1,
"height": 2843,
"hpwl": 7093,
"l_ness": 1,
"pin_num": 2,
"rsmt": 7093,
"width": 4250
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 6906,
"name": "palette_ram/n78",
"pin_num": 2,
"pins": [
{
"driver": 1,
"i": "palette_ram/U557",
"id": 21105,
"p": "Y"
},
{
"driver": 0,
"i": "palette_ram/palette_reg_26__1_",
"id": 21106,
"p": "D"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_6906
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 462494,
"aspect_ratio": 23,
"height": 3257,
"hpwl": 3399,
"l_ness": 1,
"pin_num": 2,
"rsmt": 3399,
"width": 142
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 280,
"name": "clock/n4",
"pin_num": 2,
"pins": [
{
"driver": 1,
"i": "clock/U15",
"id": 941,
"p": "Y"
},
{
"driver": 0,
"i": "clock/U11",
"id": 942,
"p": "D"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_280
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 5280044,
"aspect_ratio": 1,
"height": 2387,
"hpwl": 4599,
"l_ness": 1,
"pin_num": 2,
"rsmt": 4599,
"width": 2212
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 4207,
"name": "sprite_ram/oam[703]",
"pin_num": 2,
"pins": [
{
"driver": 1,
"i": "sprite_ram/oam_reg_168__7_",
"id": 14210,
"p": "Q"
},
{
"driver": 0,
"i": "sprite_ram/U2168",
"id": 14211,
"p": "B1"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_4207
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 5006920,
"aspect_ratio": 2,
"height": 3053,
"hpwl": 4693,
"l_ness": 1,
"pin_num": 2,
"rsmt": 4693,
"width": 1640
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 4886,
"name": "sprite_ram/oam[1382]",
"pin_num": 2,
"pins": [
{
"driver": 1,
"i": "sprite_ram/oam_reg_83__6_",
"id": 15630,
"p": "Q"
},
{
"driver": 0,
"i": "sprite_ram/U1815",
"id": 15631,
"p": "A1"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_4886
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
{
"feature": {
"C": 0,
"R": 0,
"area": 0,
"aspect_ratio": 0,
"delay": 0,
"drc_num": 0,
"drc_type": [],
"height": 0,
"layer_ratio": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"llx": 0,
"lly": 0,
"place_feature": {
"area": 11677944,
"aspect_ratio": 1,
"height": 2973,
"hpwl": 6901,
"l_ness": 0.8401222229003906,
"pin_num": 3,
"rsmt": 6901,
"width": 3928
},
"power": 0,
"slew": 0,
"urx": 0,
"ury": 0,
"via_num": 0,
"volume": 0,
"width": 0,
"wire_len": 0
},
"id": 432,
"name": "loopy0/n58",
"pin_num": 3,
"pins": [
{
"driver": 1,
"i": "loopy0/U122",
"id": 1339,
"p": "Y"
},
{
"driver": 0,
"i": "loopy0/U10",
"id": 1340,
"p": "A"
},
{
"driver": 0,
"i": "loopy0/U124",
"id": 1341,
"p": "A2"
}
],
"routing_graph": {
"edges": [],
"vertices": []
},
"wire_num": 0,
"wires": []
}
|
vectors/power_congestion_worst/nets/net_432
|
hf://datasets/AiEDA/iDATA@886efbe968e5507589968988aba61f985359c566/PPU/place/vectors/PPU_place_vectors.tar.gz
|
Dataset
iDATA is a dataset of AI + EDA, which can be used to train AI models for chip design PPA prediction, PPA-aware physical design, and related tasks.
Dataset structure
Describe the dataset structure.
aes/
├── syn_netlist/ # The synthesized netlist files、sdc files
├── place/ # The place stage def、sdc、vectors
└── route/ # The route stage def、sdc、vectors
├── rpt/ # The spef files
├── vectors/ # Stage-specific feature data
├── aes_a_route_congestion_best.def # Routed def
├── aes_a_route_congestion_best.v # Routed verilog
└── ... # more routed def/sdc
The def and verilog file name contain:
- 'a' meaning that the synthesized netlist is used area effort strategy.
- 'b' meaning that the synthesized netlist is used to ppa balance strategy.
- 'n' meaning that the synthesized netlist is used to no optimize strategy.
- 'p' meaning that the synthesized netlist is used to power effort strategy.
- 't' meaning that the synthesized netlist is used to timing effort strategy.
- 'congestion_best' meaning the place stage def is the best one with the lowest congestion.
- 'congestion_worst' meaning the place stage def is the worst one with the highest congestion.
- 'HPWL_best' meaning the place stage def is the best one with the lowest HPWL.'
- 'HPWL_worst' meaning the place stage def is the worst one with the highest HPWL.
The vectors/ directory contains feature data for each strategy design.
Dataset creation
Source data
The source data is collected from oscc-ip, iscas89, OpenRoad, and OpenLane.
Data processing
The data processing uses the AiEDA toolkit.The following steps show how to use the toolkit to process the data:
- SDC preprocessing: run
python AiEDA/test/process_sdc_files.py --dataset-dir <dataset_dir>to automatically generate placement and routing SDC files with/withoutset_propagated_clock [all_clocks](written toplace/androute/, respectively). - Batch placement runs: execute
python AiEDA/test/test_sky130_place.py --design-list <json>(add--summary-out,--first-class-only, etc. if needed). The script drives iEDA according to the workspace, Verilog, SDC, and SPEF entries in the design list to perform floorplan→route; outputs are saved in each workspace underoutput/iEDA/. The design list is an array where each item must include at leastdesign,workspace,verilog, andsdc, and may optionally includespef,clk_port_name, etc. Example:[ { "design": "gcd", "workspace": "/path/to/workspaces", "verilog": "/path/to/syn_netlist/gcd.v", "sdc": "/path/to/syn_netlist/gcd_place.sdc", "spef": "", "clk_port_name": ["clk"] } ] - Batch extract placement features: run
python AiEDA/test/batch_extract_place_features.py --dataset-dir <dataset_dir> [--patch-row-step N --patch-col-step M]. For each design, this script callsDataGeneration.generate_vectors(..., is_placement_mode=True)onplace/*.deffiles and writes results tooutput/iEDA/vectors/place. - Batch extract routing features: run
python AiEDA/test/batch_extract_route_features.py --dataset-dir <dataset_dir> [--patch-row-step N --patch-col-step M]. This reads DEF/SDC/SPEF from the routing stage and generates features underoutput/iEDA/vectors/route.
Dataset Description
Foundation Data: Net
Example File Path:
vectors/nets/net_0.jsonData Generation Mechanism:
- The
Vectorization::buildFeaturefunction is called to invokebuildLayoutDataandbuildGraphDatato construct the foundational data. generateFeatureis called to generate net features, including timing features, DRC features, and statistical features.- Finally, the data is saved via
_data_manager.saveData, where Net data is saved to thenetsdirectory using theVecLayoutFileIO::saveJsonNetsmethod. - Batch processing mode is supported; depending on the
batch_modeparameter, a single file can save one or multiple nets.
- The
Data Structure Example:
{ "id": 0, "name": "Net Name", "feature": { "llx": 79680, "lly": 68880, "urx": 82320, "ury": 74880, "wire_len": 11040, "via_num": 6, "drc_num": 0, "drc_type": [], "R": 19.71428571428571, "C": 0.0034665075873600007, "power": 1.1747088838172315e-07, "delay": 0.029491537147148576, "slew": 0.009644028041781348, "aspect_ratio": 2, "width": 2640, "height": 6000, "area": 15840000, "volume": 31680000, "layer_ratio": [0.0, 0.0, 0.2800000011920929, ...], "place_feature": { "pin_num": 2, "aspect_ratio": 2, "width": 2195, "height": 3507, "area": 7697865, "l_ness": 1.0, "hpwl": 5702, "rsmt": 5702 } }, "pin_num": 2, "pins": [ { "id": 0, "i": "Cell Instance Name", "p": "Pin Name", "driver": 1 } ], "wire_num": 11, "wires": [ { "id": 0, "feature": { "wire_width": 140, "wire_len": 960, "wire_density": null, "drc_num": 0, "R": 0.8571428571428577, "C": 4.6356008480000124e-05, "power": 8.727133642824888e-07, "delay": 0.0022083051501257146, "slew": 6.621690001873404e-11, "congestion": 4.5, "drc_type": [] }, "wire": { "id1": 742163, "x1": 81360, "y1": 74880, "real_x1": 81360, "real_y1": 75055, "r1": 312, "c1": 339, "l1": 2, "p1": -1, "id2": 1316755, "x2": 81360, "y2": 74880, "real_x2": 81360, "real_y2": 75055, "r2": 312, "c2": 339, "l2": 4, "p2": -1, "via": 5 }, "path_num": 1, "paths": [ { "id1": 742163, "x1": 81360, "y1": 74880, "real_x1": 81360, "real_y1": 75055, "r1": 312, "c1": 339, "l1": 2, "p1": -1, "id2": 1316755, "x2": 81360, "y2": 74880, "real_x2": 81360, "real_y2": 75055, "r2": 312, "c2": 339, "l2": 4, "p2": -1, "via": 5 } ], "patch_num": 2, "patchs": [528, 529] } ], "routing_graph": { "vertices": [ { "id": 0, "is_pin": 0, "is_driver_pin": 0, "x": 81360, "y": 75055, "layer_id": 2 } ], "edges": [ { "source_id": 0, "target_id": 1, "path": [ { "x": 81360, "y": 75055, "layer_id": 2 }, { "x": 82320, "y": 75055, "layer_id": 2 } ] } ] } }Field Descriptions:
Field Name Data Type Description Unit Example Value idInteger Unique identifier for the net - 0 nameString Name of the net - "ctrl$a_mux_sel[0]" featureObject Collection of net features - - feature.llxInteger Lower-left x-coordinate of the net's bounding box, taking the leftmost polygon value Database Unit 79680 feature.llyInteger Lower-left y-coordinate of the net's bounding box, taking the bottommost polygon value Database Unit 68880 feature.urxInteger Upper-right x-coordinate of the net's bounding box, taking the rightmost polygon value Database Unit 82320 feature.uryInteger Upper-right y-coordinate of the net's bounding box, taking the topmost polygon value Database Unit 74880 feature.wire_lenInteger Total length of the net's wire segments Database Unit 11040 feature.via_numInteger Number of vias Count 6 feature.drc_numInteger Number of DRC violations Count 0 feature.drc_typeArray List of DRC violation types - [] feature.RFloat Total resistance of the net Ohms 19.714 feature.CFloat Total capacitance of the net pF 0.003467 feature.powerFloat Total power consumption of the net Watts 1.1747e-07 feature.delayFloat Total delay of the net ns 0.02949 feature.slewFloat Signal slew rate ns 0.009644 feature.aspect_ratioFloat Aspect ratio of the bounding box - 2.0 feature.widthInteger Width of the bounding box Database Unit 2640 feature.heightInteger Height of the bounding box Database Unit 6000 feature.areaInteger Area of the bounding box Square DB Unit 15840000 feature.volumeInteger 3D volume of the bounding box Cubic DB Unit 31680000 feature.layer_ratioArray Wire length distribution ratio for each layer from bottom to top - [0.0, 0.0, 0.28, ...] feature.place_featureObject Features from the placement stage - - feature.place_feature.pin_numInteger Number of pins connected to the net Count 2 feature.place_feature.aspect_ratioFloat Aspect ratio of the net's bounding box, calculated from pin center points - 2.0 feature.place_feature.widthInteger Width of the pin placement bounding box, calculated from pin center points Database Unit 2195 feature.place_feature.heightInteger Height of the pin placement bounding box, calculated from pin center points Database Unit 3507 feature.place_feature.areaInteger Area of the pin placement bounding box, calculated from pin center points Square DB Unit 7697865 feature.place_feature.l_nessFloat Pin distribution, from A.B. Kahang's paper "What the L" - 1.0 feature.place_feature.hpwlInteger Half-perimeter wire length, calculated from pin center points Database Unit 5702 feature.place_feature.rsmtInteger Rectilinear Steiner minimal tree length, calculated from pin center points Database Unit 5702 pin_numInteger Number of pins Count 2 pinsArray List of pins - - pins[].idInteger Pin ID - 0 pins[].iString Name of the instance the pin belongs to - "ctrl/34" pins[].pString Pin name - "X" pins[].driverInteger Is it a driver pin? (1: Yes, 0: No) - 1 wire_numInteger Number of wire segments Count 11 wiresArray List of wire segments - - wires[].idInteger Wire segment ID - 0 wires[].featureObject Wire segment features - - wires[].feature.wire_widthInteger Wire segment width Database Unit 140 wires[].feature.wire_lenInteger Wire segment length Database Unit 960 wires[].feature.wire_densityFloat Wire segment density - 0.1 wires[].feature.drc_numInteger Number of DRC violations on the segment Count 0 wires[].feature.RFloat Resistance of the segment Ohms 0.8571 wires[].feature.CFloat Capacitance of the segment pF 4.6356e-05 wires[].feature.powerFloat Power consumption of the segment Watts 8.7271e-07 wires[].feature.delayFloat Delay of the segment ns 0.002208 wires[].feature.slewFloat Slew rate of the segment ns 6.6217e-11 wires[].feature.congestionFloat Congestion in the wire segment's area (demand-supply) - 4.5 wires[].feature.drc_typeArray List of DRC violation types on the segment - [] wires[].wireObject Node info for the wire segment; connection is not necessarily Manhattan - - wires[].wire.id1Integer Start node ID - 742163 wires[].wire.x1Integer Start x-coordinate on the grid Database Unit 81360 wires[].wire.y1Integer Start y-coordinate on the grid Database Unit 74880 wires[].wire.real_x1Integer Actual start x-coordinate Database Unit 81360 wires[].wire.real_y1Integer Actual start y-coordinate Database Unit 75055 wires[].wire.r1Integer Row number of the start point - 312 wires[].wire.c1Integer Column number of the start point - 339 wires[].wire.l1Integer Metal layer of the start point - 2 wires[].wire.p1Integer Corresponding real pin number for the start point, -1 if not a real pin - -1 wires[].wire.id2Integer End node ID - 742167 wires[].wire.x2Integer End x-coordinate on the grid Database Unit 82320 wires[].wire.y2Integer End y-coordinate on the grid Database Unit 74880 wires[].wire.real_x2Integer Actual end x-coordinate Database Unit 82320 wires[].wire.real_y2Integer Actual end y-coordinate Database Unit 75055 wires[].wire.r2Integer Row number of the end point - 312 wires[].wire.c2Integer Column number of the end point - 343 wires[].wire.l2Integer Metal layer of the end point - 2 wires[].wire.p2Integer Corresponding real pin number for the end point, -1 if not a real pin - -1 wires[].path_numInteger Number of Manhattan paths the wire is decomposed into Count 1 wires[].pathsArray Information on the Manhattan paths the wire is decomposed into - - wires[].patch_numInteger Number of patches passed through Count 2 wires[].patchsArray List of IDs of patches passed through - [528, 529] routing_graphObject Routing graph structure, representing the net's graph theory model - - routing_graph.verticesArray List of vertices in the graph, containing all nodes - - routing_graph.vertices[].idInteger Unique vertex identifier - 0 routing_graph.vertices[].is_pinInteger Is it a pin? (1: Yes, 0: No) - 0 routing_graph.vertices[].is_driver_pinInteger Is it a driver pin? (1: Yes, 0: No) - 0 routing_graph.vertices[].xInteger Vertex x-coordinate Database Unit 81360 routing_graph.vertices[].yInteger Vertex y-coordinate Database Unit 75055 routing_graph.vertices[].layer_idInteger Metal layer ID of the vertex - 2 routing_graph.edgesArray List of edges, representing connections between vertices - - routing_graph.edges[].source_idInteger Source vertex ID of the edge - 0 routing_graph.edges[].target_idInteger Target vertex ID of the edge - 1 routing_graph.edges[].pathArray List of path points on the edge, representing the actual route - - routing_graph.edges[].path[].xInteger Path point x-coordinate Database Unit 81360 routing_graph.edges[].path[].yInteger Path point y-coordinate Database Unit 75055 routing_graph.edges[].path[].layer_idInteger Metal layer ID of the path point - 2 Data Usage:
- Provides the geometric and electrical characteristics of nets for physical design analysis.
- Supports timing analysis with key parameters like resistance, capacitance, delay, and slew.
- Used for DRC checks and violation analysis.
- Power estimation and optimization.
- Routing density and congestion analysis.
- Provides training data for machine learning models to predict net performance.
Data Characteristics:
- Contains multi-level net information, from macroscopic bounding boxes to microscopic wire segment details.
- Integrates geometric, electrical, and timing characteristics.
- Supports feature analysis for both placement and routing stages.
- Stored in JSON format for easy parsing and processing.
- Provides a complete routing graph structure, facilitating graph-based analysis and algorithm optimization.
Foundation Data: Path
Example File Path:
vectors/wire_paths/wire_path_1.jsonData Generation Mechanism:
- First, foundational data is built using
buildLayoutDataandbuildGraphData. - The
buildFeatureTimingmethod of theVecFeatureclass is called for timing feature extraction. eval_tp->runVecSTA()is executed to perform a detailed timing analysis.- Specifically, the
reportWirePaths()function generates detailed path data by traversing paths in the timing graph. - Finally, the data is saved in JSON format to the
wire_pathsdirectory through file I/O operations.
- First, foundational data is built using
Data Structure Example: Path data uses a JSON array format, organizing the nodes and delay arcs of a path in chronological order. Each element in the array is a JSON object representing an element in the path (a node or an arc).
[ { "node_0": { "Point": "dpath/b_reg/_147_:CLK (sky130_fd_sc_hs__dfxtp_1)", "Capacitance": 0.003, "slew": 0.0, "trans_type": "rise" } }, { "inst_arc_0": { "Incr": 0.238 } }, { "node_1": { "Point": "dpath/b_reg/_147_:Q (sky130_fd_sc_hs__dfxtp_1)", "Capacitance": 0.018471882955040004, "slew": 0.134413, "trans_type": "rise" } }, { "net_arc_1": { "Incr": 0.000476, "edge_0": { "wire_from_node": "dpath/b_reg/_147_:Q", "wire_to_node": "dpath/a_lt_b$in1[15]:847926", "wire_R": 0.0, "wire_C": 0.0, "from_slew": 0.134413, "to_slew": 0.134413, "wire_delay": 0.0 }, // more edges... } } // more nodes and arcs... ]Field Descriptions:
Field Type Field Name Data Type Description Unit Example Value Node Info node_*Object An instance pin or internal node on the path - - node_*.PointString Node location info, format: "instance_name:pin_name (cell_type)" - "dpath/b_reg/147:CLK (sky130_fd_sc_hs__dfxtp_1)" node_*.CapacitanceFloat Node capacitance value pF 0.003 node_*.slewFloat Node signal transition time (slew) ns 0.134413 node_*.trans_typeString Signal transition type - "rise" or "fall" Instance Arc inst_arc_*Object Internal delay arc of an instance, representing cell-internal propagation delay - - inst_arc_*.IncrFloat Incremental delay within the instance ns 0.238 Net Arc net_arc_*Object Net delay arc, representing signal propagation delay on the net - - net_arc_*.IncrFloat Total incremental delay of the net ns 0.000476 net_arc_*.edge_*Object Specific wire segment information within the net - - net_arc_*.edge_*.wire_from_nodeString Start node name of the wire segment - "dpath/b_reg/147:Q" net_arc_*.edge_*.wire_to_nodeString End node name of the wire segment - "dpath/a_lt_b$in1[15]:847926" net_arc_*.edge_*.wire_RFloat Resistance value of the wire segment Ω 0.642857 net_arc_*.edge_*.wire_CFloat Capacitance value of the wire segment pF 3.618685e-05 net_arc_*.edge_*.from_slewFloat Slew at the start of the wire segment ns 0.134413 net_arc_*.edge_*.to_slewFloat Slew at the end of the wire segment ns 0.134413033744 net_arc_*.edge_*.wire_delayFloat Delay introduced by the wire segment ns 1.18515e-05 Data Usage:
- Timing Analysis: Provides detailed path delay information for analyzing and optimizing the design's timing performance.
- Signal Integrity Assessment: Includes signal transition times and net RC parameters, supporting signal integrity analysis.
- Power Analysis: Based on node capacitance and toggle rates, dynamic power can be calculated.
- Path Visualization: The data structure facilitates the graphical representation and analysis of paths.
- Timing Closure Verification: Used to verify that the design meets timing constraints.
- Machine Learning Model Training: Provides training data for predicting path delays, signal integrity, and other issues.
Data Characteristics:
- Temporal Order: Elements in the array are strictly arranged in the chronological order of signal propagation.
- Alternating Structure: Nodes (
node_*) and arcs (inst_arc_*/net_arc_*) appear alternately, forming a complete path. - Incremental IDs: The IDs of nodes and arcs increase sequentially along the path, making it easy to trace the signal flow.
- Hierarchical Details: Net arcs contain nested, detailed wire segment information (
edge_*), providing fine-grained interconnect characteristics.
Foundation Data: Graph
Example File Path:
vectors/wire_graph/timing_wire_graph.jsonData Generation Mechanism:
- Data Preparation: In the
Vectorization::buildFeaturemethod,_data_manager.buildLayoutData()is first called to build layout data, followed by_data_manager.buildGraphData()to construct the initial graph data structure. - Feature Extraction: The
generateFeature()method is called to create aVecFeatureobject, andfeature.buildFeatureTiming()generates timing-related features. - Timing Analysis: The
runVecSTAmethod (called on anInitSTA::getInst()instance viaeval_tp->runVecSTA()) performs a detailed timing analysis to calculate key parameters like arrival times and required times for nodes. - Data Saving: Finally, the
_data_manager.saveData()method saves the generated Graph data as a JSON file.
- Data Preparation: In the
Data Structure Example: Graph data is organized in JSON format, using a standard graph data structure to represent the net connection relationships in the chip design.
{ "nodes": [ // Array of nodes, representing pins, ports, and routing nodes { "id": "node_0", "name": "clk", "is_pin": false, "is_port": true, "node_feature": { "is_input": true, "fanout_num": 1, "is_endpoint": false, "cell_name": "NA", "sizer_cells": [], "node_coord": [ 0.0, 0.0 ], "node_slews": [ 0.0, 0.0, 0.0, 0.0 ], "node_capacitances": [ 0.0, 0.0, 0.0, 0.0 ], "node_arrive_times": [ 1.1e+20, 1.1e+20, 1.1e+20, 1.1e+20 ], "node_required_times": [ 1.1e+20, 1.1e+20, 1.1e+20, 1.1e+20 ], "node_net_load_delays": [ 0.0, 0.0, 0.0, 0.0 ], "node_toggle": 1.0, "node_sp": 0.5, "node_internal_power": 0.0, "node_net_power": 2.8232123814158402e-05 } }, // more nodes... ], "edges": [ // Array of edges, representing connections between nodes { "id": "edge_0", "from_node": 510, "to_node": 746, "is_net_edge": false, "edge_feature": { "edge_delay": [ 0.088476, 0.051862, 0.088476, 0.051862 ], "edge_resistance": 0.0, "inst_arc_internal_power": 0.00011665750115296025 } }, // more edges... ] }Field Descriptions:
Nodes: Each node represents a connection point in the chip design, which could be a cell pin, a port, or a routing node.
Field Name Data Type Description Unit Example Value idstring Unique identifier for the node - "node_4" namestring Node name, usually containing instance and pin names - "clk_0_buf:X" is_pinboolean Whether it is a cell pin - true is_portboolean Whether it is a chip port - false node_featureobject Collection of node feature attributes, including timing and power info - - Node Features (
node_feature):Field Name Data Type Description Unit Example Value is_inputboolean Whether it is an input node (relative to the cell) - false fanout_numinteger Fanout count, indicating the number of loads driven by this node - 17 is_endpointboolean Whether it is an endpoint of a timing path - false cell_namestring Cell name, if the node is a cell pin - "sky130_fd_sc_hs__buf_1" sizer_cellsarray[string] List of replaceable cells for cell sizing optimization - ["sky130_fd_sc_hs__buf_16", ...] node_coordarray[float] Node coordinates (x, y) DB Unit [57.842, 61.732] node_slewsarray[float] Node slew times, includes values for four process corners ns [0.0, 0.0, 0.0, 0.0] node_capacitancesarray[float] Node capacitance values, includes values for four process corners pF [0.0, 0.0, 0.0, 0.0] node_arrive_timesarray[float] Signal arrival times at the node, includes values for four process corners ns [1.1e+20, 1.1e+20, ...] node_required_timesarray[float] Required arrival times at the node, includes values for four process corners ns [1.1e+20, 1.1e+20, ...] node_net_load_delaysarray[float] Node net load delays, includes values for four process corners ns [0.0, 0.0, 0.0, 0.0] node_togglefloat Node toggle rate, indicating signal transitions per unit time - 1.0 node_spfloat Signal probability, the probability of the signal being high - 0.5 node_internal_powerfloat Node internal power, mainly cell internal power W 0.0 node_net_powerfloat Node net power, mainly dynamic power on the net W 0.00012901 Edges: Each edge represents a connection between two nodes, which can be an internal cell connection or a net connection.
Field Name Data Type Description Unit Example Value idstring Unique identifier for the edge - "edge_7960" from_nodeinteger Start node ID (index in the nodesarray)- 7586 to_nodeinteger End node ID (index in the nodesarray)- 7587 is_net_edgeboolean Whether it is a net edge (true for net, false for internal cell connection) - true edge_featureobject Collection of edge feature attributes, including delay and power info - - Edge Features (
edge_feature):Field Name Data Type Description Unit Example Value edge_delayarray[float] Edge delay values, includes values for four process corners ns [0.0, 0.0, 0.0, 0.0] edge_resistancefloat Edge resistance value, mainly for net edges Ohms 18.42857 inst_arc_internal_powerfloat Instance arc internal power, mainly for internal cell edges W 0.0
Data Usage:
- Timing Analysis: Provides a complete timing graph structure, supporting Static Timing Analysis (STA).
- Power Optimization: Contains detailed power-related parameters, supporting power analysis and optimization.
- Physical Design Verification: Offers the connection relationship between physical implementation and logical design, supporting design verification.
- Machine Learning Feature Extraction: Provides structured chip design feature data for ML models, supporting prediction and optimization tasks.
- Design Visualization: Supports converting the chip design into a visual graph structure for better understanding and analysis.
Data Characteristics:
- STA Support: The Graph data includes complete timing-related information, supporting calculations and verifications related to Static Timing Analysis (STA).
- Process Corner Coverage: Key parameters (like delay, slew, etc.) include values for four process corners, supporting full process corner analysis.
- Hierarchical Structure: Data is organized by nodes and edges from graph theory, clearly expressing the connection relationships in the chip design.
- Multi-dimensional Features: Each node and edge contains multi-dimensional features like timing, power, and geometric location, supporting comprehensive analysis and optimization.
Foundation Data: Patch
Example File Path:
vectors/patchs/patch_0.jsonData Generation Mechanism:
- The
Vectorization::buildFeaturefunction calls thebuildPatchDatamethod to construct the Patch data. - The data generation process is managed by
VecDataManagerand specifically implemented byVecPatchDataManager. VecPatchInitis responsible for initializing the Patch grid and populating it with net and wire segment information.- Finally, the data is saved as a JSON file via
VecLayoutFileIO::saveJsonPatchs.
- The
Data Structure Example:
{ "id": 0, "patch_id_row": 0, "patch_id_col": 0, "llx": 0, "lly": 0, "urx": 4320, "ury": 4320, "row_min": 0, "row_max": 18, "col_min": 0, "col_max": 18, "cell_density": 0.8981481481481481, "pin_density": 40, "net_density": 0.12371399176954732, "macro_margin": 255180, "RUDY_congestion": 0.00029195559407049423, "EGR_congestion": 3.0, "timing": 0.0, "power": 3.2690654345212375e-07, "IR_drop": 0.0, "sub_nets": [ { "id": 626, "llx": 1000, "lly": 0, "urx": 4320, "ury": 4320 }, // More sub-nets ... ], "patch_layer": [ { "id": 4, "feature": { "wire_width": 140, "wire_len": 3120, "wire_density": 0.023405349794238684, "congestion": 2.0 }, "net_num": 1, "nets": [ { "id": 650, "wire_num": 2, "wires": [ { "id": 6600, "feature": { "wire_len": 3120 }, "path_num": 1, "paths": [ { "id1": 1151867, "x1": 720, "y1": 1200, "real_x1": 720, "real_y1": 1200, "r1": 5, "c1": 3, "l1": 4, "p1": -1, "id2": 1158835, "x2": 720, "y2": 4320, "real_x2": -1, "real_y2": -1, "r2": 18, "c2": 3, "l2": 4, "p2": -1 } ] }, // More wire segments... ] } ] }, // More patch_layers... ] }Field Descriptions:
Global Information
Field Name Data Type Description Unit Example Value idInteger Unique identifier for the patch, as an integer sequence number - 0 patch_id_rowInteger Row index of the patch in the grid - 0 patch_id_colInteger Column index of the patch in the grid - 0 llxInteger Lower-left x-coordinate of the patch Database Unit 0 llyInteger Lower-left y-coordinate of the patch Database Unit 0 urxInteger Upper-right x-coordinate of the patch Database Unit 4320 uryInteger Upper-right y-coordinate of the patch Database Unit 4320 row_minInteger Minimum row number of nodes within the patch - 0 row_maxInteger Maximum row number of nodes within the patch - 18 col_minInteger Minimum column number of nodes within the patch - 0 col_maxInteger Maximum column number of nodes within the patch - 18 cell_densityFloat Cell density within the patch, value range [0, 1] - 0.898148 pin_densityFloat Pin density within the patch Number of pins 40 net_densityFloat Net density within the patch - 0.123714 macro_marginInteger Maximum margin distance to a macro cell within the patch Database Unit 255180 RUDY_congestionFloat Congestion estimation value based on the RUDY model - 0.000292 EGR_congestionFloat Congestion estimation value based on the EGR model - 3.0 timingFloat Timing information ns 0.0 powerFloat Power information W 3.26907e-07 IR_dropFloat IR drop information V 0.0 sub_netsArray Information about sub-nets contained within the patch - [Array of sub-net objects] patch_layerArray Detailed information for each layer of the patch - [Array of layer objects] Sub-net Information (
sub_nets): Each element in thesub_netsarray is a sub-net, defining the overlapping area of a net with the patch, as follows:Field Name Data Type Description Unit Example Value idInteger Unique identifier for the sub-net - 626 llxInteger Lower-left x-coordinate of the sub-net Database Unit 1000 llyInteger Lower-left y-coordinate of the sub-net Database Unit 0 urxInteger Upper-right x-coordinate of the sub-net Database Unit 4320 uryInteger Upper-right y-coordinate of the sub-net Database Unit 4320 Layer Information (
patch_layer): Each element in thepatch_layerarray represents a layer within the patch, defined as follows:Field Name Data Type Description Unit Example Value idInteger Layer ID, corresponding to a metal layer in the physical design - 4 featureObject Layer feature information - See table below net_numInteger Number of nets contained in the layer - 1 netsArray List of nets in the layer - [Array of net objects] Layer Features (
feature)Field Name Data Type Description Unit Example Value wire_widthInteger Wire segment width Database Unit 140 wire_lenInteger Total length of wire segments Database Unit 3120 wire_densityFloat Wire density - 0.023405 congestionFloat Congestion level of this layer - 2.0 Net Information (
nets): Each element in thenetsarray represents a net, defined as follows:Field Name Data Type Description Unit Example Value idInteger Unique identifier for the net - 650 wire_numInteger Number of wires in the net - 2 wiresArray List of wires - [Array of wire objects] Wire Information (
wires): Each element in thewiresarray represents a wire segment, defined as follows:Field Name Data Type Description Unit Example Value idInteger Unique identifier for the wire - 6600 featureObject Wire feature information - {"wire_len": 3120} path_numInteger Number of paths contained in the wire - 1 pathsArray List of paths - [Array of path objects] Path Information (
paths): Each element in thepathsarray represents a segment of a wire's path, defined as follows:Field Name Data Type Description Unit Example Value id1Integer Unique identifier for the start point - 1151867 x1,y1Integer Grid coordinates of the start point Database Unit 720, 1200 real_x1,real_y1Integer Actual physical coordinates of the start point Database Unit 720, 1200 r1,c1Integer Row and column of the grid where the start point is located - 5, 3 l1Integer Layer ID where the start point is located - 4 p1Integer Pin index of the start point, -1 for non-real pins - -1 id2Integer Unique identifier for the end point - 1158835 x2,y2Integer Grid coordinates of the end point Database Unit 720, 4320 real_x2,real_y2Integer Actual physical coordinates of the end point Database Unit 720, 4320 r2,c2Integer Row and column of the grid where the end point is located - 18, 3 l2Integer Layer ID where the end point is located - 4 p2Integer Pin index of the end point, -1 for non-real pins - -1 viaInteger Via ID (optional, exists only for cross-layer connections) - 10 (Via number)
Data Usage:
- Physical Layout Analysis: Provides detailed physical characteristics of different regions in a chip design, supporting designers in macroscopic layout evaluation.
- Layout Visualization: The data structure facilitates the graphical display and analysis of layout regions.
- Performance Optimization Guidance: Based on path information and electrical characteristics, it provides detailed physical foundation data for timing performance optimization.
- AI Model Training Data: Provides structured physical design feature data for deep learning models, supporting AI tasks like routing prediction and congestion analysis.
Data Characteristics:
- Patch data is divided into grid-like patch units based on physical design regions.
- Each patch contains information for multiple layers, and each layer includes detailed geometric and electrical attributes of nets, wires, and paths.
- The data is organized hierarchically from macro to micro: patch -> layer -> net -> wire -> path.
- Path information precisely describes the connection points on a wire, including coordinates, layer, and grid position.
Foundation Data: Instance
Example File Path:
vectors/instances/instances.jsonData Generation Mechanism:
- The
Vectorization::buildFeaturefunction calls the_data_manager.saveDatamethod to save all data. - The
saveDatamethod internally calls theVecLayoutFileIO::saveJsonfunction. - The
saveJsonfunction calls thesaveJsonInstancesmethod specifically to generate Instance data. - Finally, the data is saved in JSON format to the specified directory.
- The
Data Structure Example: The
instances.jsonfile uses the following structure:{ "instance_num": 1448, // Total number of instances "instances": [ { "id":0, "cell_id":236, "name":"ctrl/_17_", "cx":78480, "cy":61605, "width":1440, "height":3330, "llx":77760, "lly":59940, "urx":79200, "ury":63270 }, // More instances... ] }Field Descriptions:
The fields for each instance are described as follows:
Field Name Data Type Description Unit Example Value idInteger Unique identifier for the instance - 1 cell_idInteger ID of the cell master to which the instance belongs - 1001 nameString Instance name - "sky130_fd_sc_hs__and2_1_0" cxFloat x-coordinate of the instance's center point Database Unit 1234.5 cyFloat y-coordinate of the instance's center point Database Unit 5678.9 widthFloat Instance width Database Unit 420.0 heightFloat Instance height Database Unit 180.0 llxFloat Lower-left x-coordinate of the instance Database Unit 1024.5 llyFloat Lower-left y-coordinate of the instance Database Unit 5588.9 urxFloat Upper-right x-coordinate of the instance Database Unit 1444.5 uryFloat Upper-right y-coordinate of the instance Database Unit 5768.9 Data Usage:
- Physical Layout Representation: The instance data precisely describes the physical location and size of each standard cell in the design.
- Timing Analysis Support: The location information of instances is fundamental for calculating wire lengths and interconnect delays.
- Routability Analysis: The distribution of instances is used to evaluate layout quality and routing difficulty.
- AI Model Training: Provides real physical design instance layout data for machine learning models.
Data Characteristics:
- Comprehensiveness: Contains information for all instances in the design, with no omissions.
- Precision: Coordinate and size information is accurate to the database unit.
- Associativity: Linked to cell library information via
cell_id. - Uniform Structure: All instances use the same data structure, facilitating batch processing.
- Extensibility: The JSON format supports the addition of extra instance attributes.
Foundation Data: Instance Graph
Example File Path:
vectors/instance_graph/timing_instance_graph.jsonData Generation Mechanism:
- The
Vectorization::buildFeaturefunction calls thegenerateFeaturemethod. - The
generateFeaturemethod internally calls theVecFeature::buildFeatureTimingfunction. - The
buildFeatureTimingfunction callseval_tp->getTimingInstanceGraph()to obtain the instance graph data. - Finally, the data is saved in JSON format to the specified directory via the
SaveTimingInstanceGraphfunction.
- The
Data Structure Example:
The
timing_instance_graph.jsonfile uses the following structure:{ "nodes": [ { "id": "node_0", "name": "ctrl/_34_", "leakage_power": 1.6979909062047418e-10 }, // More nodes... ], "edges": [ { "id": "edge_0", "from_node": 0, "to_node": 1 }, // More edges... ] }Field Descriptions:
Nodes: Each node object represents an instance and contains the following fields:
Field Name Data Type Description Unit Example Value idString Unique identifier for the node, format "node_number" - "node_0" nameString Instance name - "ctrl/34" leakage_powerFloat Leakage power of the instance W 1.697e-10 Edges: Each edge represents the connection relationship between two instances and contains the following fields:
Field Name Data Type Description Unit Example Value idString Unique identifier for the edge, format "edge_number" - "edge_1037" from_nodeInteger Index of the driving node (corresponds to the index in the nodesarray)- 640 to_nodeInteger Index of the receiving node (corresponds to the index in the nodesarray)- 188
Data Usage:
- Timing Analysis: The instance graph provides all instances and their connection relationships in the design, which can be used for timing path analysis and delay prediction.
- Power Estimation: Contains leakage power information, which can be used for overall power estimation.
- Physical Constraint Study: Reflects the connection density between instances, which helps in studying the impact of physical constraints on the design.
- AI Model Training: Provides instance-level connection relationship and power data for machine learning models.
Data Characteristics:
- Structured Representation: Uses a graph data structure to clearly represent the connection relationships between instances.
- Lightweight Design: Edges contain only basic connection information, facilitating fast processing and analysis.
- Includes Power Information: Each node includes leakage power data, which is convenient for power analysis.
- Global View: Provides a global view of the instance connections for the entire design.
Foundation Data: Cell
Example File Path:
vectors/tech/cells.jsonData Generation Mechanism:
- The
Vectorization::buildFeaturefunction calls_data_manager.buildLayoutDatato construct the basic layout data. - After data construction is complete,
_data_manager.saveDatais called to save the data. - During the saving process, the
VecLayoutFileIO::saveJsonmethod calls thesaveJsonCellsmethod. - The
saveJsonCellsmethod retrieves cell data from_layout->get_cells().get_cell_map()and saves it to thecells.jsonfile.
- The
Data Structure Example:
{ "cell_num": integer, // Total number of cell_master units "cells": [ // Array of cells { "id": integer, // Cell ID "name": "string", // Cell name "width": integer, // Cell width "height": integer // Cell height }, // More cell masters... ] }Field Descriptions:
Field Name Type Description Unit Example Value cell_numinteger Total number of cells in the cell library - 416 cellsarray Array containing information for all cells - [{}, ...] idinteger Unique identifier for the cell - 415 namestring Cell name, including technology information and functional description - "sky130_sram_1rw1r_44x64_8" widthinteger Physical width of the cell Database Unit (e.g., nm) 445240 heightinteger Physical height of the cell Database Unit (e.g., nm) 237415 Data Usage:
- Physical Design Reference: Provides physical dimension information for standard cells and macro cells for placement and routing.
- Area Estimation: Used for chip area calculation and density analysis.
- Power Analysis: Serves as base data for power calculation.
- Timing Optimization: Provides cell-level references for timing analysis.
Data Characteristics:
- Completeness: Contains information on all available standard cells and macro cells.
- Physical Accuracy: Provides precise physical dimension parameters.
- Process-Related: The data reflects cell characteristics under a specific technology node.
- Structured Storage: Uses JSON format for easy parsing and processing by programs.
- Extensibility: The data structure is simple and clear, making it easy to add new cell attributes.
Foundation Data: Technology
Example File Path:
vectors/tech/tech.jsonData Generation Mechanism:
- The
Vectorization::buildFeaturefunction calls_data_manager.buildLayoutDatato construct the basic layout data. - After data construction is complete,
_data_manager.saveDatais called to save the data. - During the saving process, the
VecLayoutFileIO::saveJsonmethod calls thesaveJsonTechmethod. - The
saveJsonTechmethod retrieves layer data from_layout->get_layout_layers().get_layout_layer_map()and via data from_layout->get_via_name_map(), saving them to thetech.jsonfile.
- The
Data Structure Example:
{ "layer_num": integer, // Number of technology layers "layers": [ // Array of layer information { "id": integer, // Layer number "name": "string" // Layer name }, // More layers... ], "via_num": integer, // Number of via types "vias": [ // Array of via information { "id": integer, // Via number "name": "string", // Via name "bottom": { // Bottom metal enclosure area coordinates "llx": integer, "lly": integer, "urx": integer, "ury": integer }, "cut": { // Via cut area coordinates "llx": integer, "lly": integer, "urx": integer, "ury": integer }, "top": { // Top metal enclosure area coordinates "llx": integer, "lly": integer, "urx": integer, "ury": integer }, "row": integer, // Number of via rows "col": integer, // Number of via columns "bottom_direction": "string", // Offset direction of the cut relative to the bottom enclosure "top_direction": "string" // Offset direction of the cut relative to the top enclosure }, // More vias... ] }Field Descriptions:
Layer Information Fields
Field Name Type Description Unit Example Value layer_numinteger Total number of layers in the technology - 11 layersarray Array of detailed information for all layers - [{}, ...] idinteger Sequential number of the layer (from bottom to top) - 10 namestring Layer name (metal layer, via layer, etc.) - "met5" Via Information Fields
Field Name Type Description Unit Example Value via_numinteger Total number of via types - 32 viasarray Array of detailed information for all via types - [{}, ...] idinteger Unique identifier for the via type - 0 namestring Via type name - "L1M1_PR" bottomobject Bounding box coordinates of the bottom metal enclosure area Database Unit {"llx": -85, "lly": -85, "urx": 85, "ury": 85} cutobject Bounding box coordinates of the via cut area Database Unit {"llx": -85, "lly": -85, "urx": 85, "ury": 85} topobject Bounding box coordinates of the top metal enclosure area Database Unit {"llx": -145, "lly": -115, "urx": 145, "ury": 115} rowinteger Number of rows of via cuts - 1 colinteger Number of columns of via cuts - 1 bottom_directionstring Connection direction for the bottom layer (C-Center, N-North, S-South, E-East, W-West) - "C" top_directionstring Connection direction for the top layer (C-Center, N-North, S-South, E-East, W-West) - "C"
Data Usage:
- Physical Design Rule Checking: Provides detailed parameters for layers and vias to verify if the design complies with technology rules.
- Routing Guidance: Serves as technology constraint input for automatic routing tools.
- Design Visualization: Provides accurate layer and via representations for design visualization.
- Timing Analysis: Provides necessary technology parameters for signal integrity and timing analysis.
Data Characteristics:
- Technology Accuracy: Accurately reflects layer and via characteristics for a specific technology node.
- Completeness: Includes all necessary physical layers and via types.
- Structured Representation: Uses JSON format for easy parsing and processing by programs.
- Complete Spatial Information: Provides precise geometric coordinates for different parts of each via.
- Directional Information: Includes directional information for via connections, which helps in understanding routing topology.
Data Owner
iEDA Team
License
GPL
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